1. Field of the Invention
The present invention relates to a sense amplifier, and more particularly, to a sense amplifier with a compensating circuit.
2. Description of the Prior Art
In recent years, technology and applications of the flash memory have gradually been developed along with requirements of portable electronic products. These portable electronic products include film of a digital camera, a handheld electric device, a memory of a video game apparatus, a personal digital assistant (PDA), a telephone recorder, and a programmable IC, etc. The flash memory is the non-volatile memory, in which an operating principle is to control a switch of a gate channel to achieve an objective of memorizing data via changing a threshold voltage of a transistor or a memory cell so as to prevent data stored in the memory from disappearing due to disconnection with a power supply.
In general, the flash memory mainly includes a floating gate for storing electric charges, and a control gate disposed on the floating gate for controlling access of data, where the control gate is separated from the floating gate via a dielectric layer formed by an oxide-nitride-oxide (ONO) structure. Therefore, the memory can utilize a principle of thermal electrons or tunneling to store induced electric charges within the overlapped gates so as to store a signal ‘0’ in the memory. If data stored in the memory needs to be changed, the only process is to supply a small extra amount of energy to remove electrons stored in the floating gate so as to rewrite data.
To access states of each memory cell in the memory, a sense amplifier is used to detect the induced electric charges stored in the memory cells so as to determine a value ‘0’ or ‘1’ that the memory cells represent. In general, the sense amplifier divides into a voltage mode and a current mode according to detecting types. For example, when a flash memory operates under a low voltage, the sense amplifier with the voltage mode cannot operate normally in such low voltage situations due to lower voltage swings. Therefore, the sense amplifier cannot exactly determine the storing state of the induced charges stored in the memory cells. Nevertheless, the sense amplifier using the current mode can be operated in the flash memory under the low voltage. The sense amplifier can obtain the storing state of the induced electric charges stored in the memory cells through an influence of current variance vs. voltage.
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a conventional sense amplifier for a memory. The sense amplifier 100 includes an operational amplifier 101, a comparator 102, a reference current source 103, and four transistors M5, M6, M13, and M14. The transistors M13 and M14 are controlled by word lines ZWL and ZCL of the memory. The transistors M13 and M14 are PMOS transistors. The transistors M5 and M6 are NMOS transistors. The gate of the transistor M5 is coupled to the output end of the operational amplifier 101, and the drain of the transistor M5 is coupled to the positive input end of the operational amplifier 101. The transistor M5 and the operational amplifier 101 form a negative feedback loop so as to increase the stability of the sense amplifier 100. The drain of the transistor M5 is coupled to a bit line of the memory for receiving a current of the bit line. The comparator 102 compares a reference current Ir and the current of the bit line to determine a value that the memory cell represents.
However, the voltage drop is generated when the current of the bit line passing through the bit line load 104. Since the positive input end and the negative input end of the operational amplifier 101 are virtual short, the voltage at node A will be kept to the voltage VDL. Thus, the voltage VD will rise when the current of the bit line passing through the bit line load 104. That is, the voltage VD varies with the current of the bit line. In this way, the voltage VD has a variation when the data of the memory cell is read. The variation of the voltage VD decreases the current margin, which may causes the comparator 102 to generate an error signal.